Significant progress has been made in experimental demonstrations of quantum error correction (QEC), but the resource overhead required to achieve true fault-tolerant quantum computing remains substantial. In this talk, we demonstrate that strategic application of QEC primitives can yield significant net benefits to quantum computation with modest overhead on a superconducting processor.

Two-qubit entangling gates tend to be the most error-prone operations in NISQ-era superconducting quantum computers. To maximize the fidelity of quantum algorithms on these devices, suppressing these errors becomes a necessity. In addition to errors within the two-qubit subspace, these gates also induce coherent errors on adjacent idle “spectator” qubits.

Entangling gate families parametrized by continuous parameters have recently gathered significant interest since they are typically shorter, using up a smaller fraction of the qubit coherence time available. Fast and efficient calibration of such shorter, high fidelity entangling gates and the construction of optimal circuit synthesis schemes that leverage the richer gate set are open problems that we address in this work.

The rapid advancement in quantum processor design and fabrication has driven the rise of quantum processing units (QPUs) globally, increasing the need for scalable and robust characterization and calibration of high-fidelity quantum gates. Meeting this challenge requires autonomous methods that can adaptively optimize performance across different devices.

This study showcases how a novel hybrid algorithm combined with a comprehensive error suppression pipeline can efficiently solve large-scale binary optimization problems, pushing the boundaries of what is currently possible with existing quantum hardware and bringing us closer to an era where quantum computers can solve relevant real-world problems.

Compilation inefficiencies, such as increased circuit depth and gate counts, significantly impact performance, leading to error accumulation and algorithm failure. Effective compilers must navigate noise, hardware constraints, leverage efficient gates, and streamline circuits while balancing optimization time with quality.

Dynamical decoupling (DD) is a method to suppress errors by repeatedly reversing the sense of error accumulation during idle delays. In this talk, we describe how ideal DD sequences may be derived efficiently for arbitrary input circuits. Our method scales linearly with the number of idle instructions, and remains tractable far beyond currently feasible circuit sizes.

Today's quantum computers are noisy and prone to errors, limiting the breadth and depth of executable circuits. We introduce a new circuit resynthesis technique that dramatically reduces the number of one-qubit and two-qubit gates needed to realize a circuit through approximation and pattern matching, thereby improving the overall circuit fidelity.

With the emergence of new foundries supplying fabricated quantum chips, the need for versatile software solutions to optimize QPU performance for diverse applications has become increasingly critical. This talk presents an automated workflow using the Q-CTRL software stack to transform uncalibrated, off-the-shelf QPUs from bare metal into finely-tuned, application-specific quantum devices.

We introduce a comprehensive QAOA-based quantum solver for binary combinatorial optimization problems on gate-model quantum computers that consistently delivers correct solutions for problems with up to 156 qubits. We provide an overview of the internal workflow, describing the integration of a customized ansatz and variational parameter update strategy, efficient error suppression in hardware execution, and scalable post-processing to correct for bit-flip errors.